Currently, high-frequency and high-speed PCB design has become the mainstream, and every PCB Layout engineer should be proficient in it. Next, 2PCB will share with you some design experience of hardware experts in high-frequency and high-speed PCB circuits, hoping to help you.
1. How to avoid high-frequency interference?
The basic idea of avoiding high-frequency interference is to minimize the interference of the electromagnetic field of high-frequency signals, which is the so-called crosstalk. You can increase the distance between high-speed signals and analog signals, or add ground guard/shunt traces next to analog signals. Also pay attention to the noise interference of digital ground to analog ground.
2. How to consider impedance matching when designing high-speed PCB design schematics?
When designing high-speed PCB circuits, impedance matching is one of the design elements. The impedance value has an absolute relationship with the routing method, such as whether it is on the surface layer (microstrip) or the inner layer (stripline/double stripline), the distance from the reference layer (power layer or ground layer), the routing width, and the PCB material will affect the characteristic impedance value of the routing. That is to say, the impedance value can only be determined after routing. General simulation software cannot take into account some impedance discontinuous routing conditions due to the limitations of the line model or the mathematical algorithm used. At this time, only some terminators (terminations), such as series resistors, can be reserved on the schematic diagram to mitigate the effect of impedance discontinuity. The real fundamental solution to the problem is to try to avoid impedance discontinuity during routing.
3. In high-speed PCB design, from which aspects should designers consider EMC and EMI rules?
Generally, EMI/EMC design needs to consider both radiation (radiated) and conduction (conducted). The former belongs to the higher frequency part (>30MHz) and the latter is the lower frequency part (<30MHz). Therefore, we cannot only pay attention to the high frequency and ignore the low frequency part. A good EMI/EMC design must consider the location of the device, the arrangement of the PCB stacking, the routing of important connections, the selection of devices, etc. at the beginning of the layout. If these are not arranged in advance, solving them afterwards will be counterproductive and increase costs. For example, the location of the clock generator should not be close to the external connector as much as possible, and the high-speed signal should be routed on the inner layer as much as possible, and attention should be paid to the characteristic impedance matching and the continuity of the reference layer to reduce reflection. The slew rate of the signal pushed by the device should be as small as possible to reduce the high-frequency component. When selecting the decoupling (decoupling/bypass) capacitor, pay attention to whether its frequency response meets the requirements to reduce the power layer noise. In addition, pay attention to the return path of the high-frequency signal current to make its loop area as small as possible (that is, the loop impedance is as small as possible) to reduce radiation. The range of high-frequency noise can also be controlled by splitting the ground layer. Finally, the grounding point (chassis ground) of the PCB and the shell should be appropriately selected.
4. How to choose the PCB material?
The selection of PCB material must strike a balance between meeting the design requirements and mass production and cost. The design requirements include electrical and mechanical parts. Usually, this material problem is more important when designing very high-speed PCB boards (frequencies greater than GHz). For example, the dielectric loss of the commonly used FR-4 material at frequencies of several GHz will have a great impact on signal attenuation and may not be suitable. In terms of electrical, it is necessary to pay attention to whether the dielectric constant and dielectric loss are suitable for the designed frequency.
5. How to meet EMC requirements as much as possible without causing too much cost pressure?
The cost increase on PCB boards due to EMC is usually due to the increase in the number of ground layers to enhance the shielding effect and the addition of ferrite beads, chokes and other high-frequency harmonic suppression devices. In addition, it is usually necessary to match the shielding structure on other mechanisms to make the entire system pass the EMC requirements. The following only provides a few design tips for PCB boards to reduce the electromagnetic radiation effect generated by the circuit.
Try to use devices with slower signal slew rate to reduce the high-frequency components generated by the signal.
Pay attention to the placement of high-frequency devices and do not place them too close to external connectors.
Pay attention to the impedance matching of high-speed signals, the routing layer and its return current path to reduce high-frequency reflection and radiation.
Place enough and appropriate decoupling capacitors at the power pins of each device to mitigate the noise on the power layer and the ground layer. Pay special attention to whether the frequency response and temperature characteristics of the capacitor meet the design requirements.
The ground near the external connector can be properly separated from the ground layer, and the ground of the connector can be connected to the chassis ground as close as possible.
Ground guard/shunt traces can be appropriately used next to some particularly high-speed signals. But pay attention to the impact of guard/shunt traces on the characteristic impedance of the routing.
The power layer is 20H inward than the ground layer, and H is the distance between the power layer and the ground layer.
6. What aspects should be paid attention to in the design, routing, and layout of high-frequency PCBs above 2G?
High-frequency PCBs above 2G belong to RF circuit design and are not within the scope of discussion of high-speed digital circuit design. The layout and routing of RF circuits should be considered together with the schematic diagram, because layout and routing will cause distribution effects. Moreover, some passive components in RF circuit design are defined by parameters and implemented by copper foils with special shapes, so EDA tools are required to provide parameterized components and edit copper foils with special shapes. Mentor’s boardstation has a special RF design module that can meet these requirements. Moreover, general RF design requires a special RF circuit analysis tool. The most famous one in the industry is Agilent’s EESoft, which has a good interface with Mentor’s tools.
7. Will adding test points affect the quality of high-speed signals?
Whether it will affect the signal quality depends on the way of adding test points and how fast the signal is. Basically, the additional test points (without using existing vias (via or DIP pins) as test points) may be added to the line or a short line may be pulled out from the line. The former is equivalent to adding a very small capacitor to the line, and the latter is an additional branch. Both of these situations will have some impact on high-speed signals, and the degree of impact is related to the frequency speed of the signal and the edge rate of the signal. The impact can be known through simulation. In principle, the smaller the test point, the better (of course, it must meet the requirements of the test equipment) and the shorter the branch, the better.