Signal integrity (SI) refers to the quality of the signal on the transmission path. With the increase in the output switching speed of integrated circuits and the increase in the density of PCB boards, signal integrity has become one of the issues that must be concerned about in high-speed digital PCB design. How to fully consider the factors of signal integrity in the design process of PCB boards and take effective control measures has also become a hot topic in today’s PCB design industry
PCB signal integrity issues
PCB signal integrity issues mainly include signal reflection, crosstalk, signal delay and timing errors.
1. Reflection
When the signal is transmitted on the transmission line, when the characteristic impedance of the transmission line on the high-speed PCB does not match the source impedance or load impedance of the signal, the signal will be reflected, causing the signal waveform to overshoot, undershoot and the resulting ringing phenomenon.
Overshoot refers to the first peak (or valley) of the signal jump, which is an additional voltage effect above the power supply level or below the reference ground level; undershoot refers to the next valley (or peak) of the signal jump. Excessive overshoot voltage often impacts for a long time and can cause damage to the device. Undershoot can reduce the noise margin. Ringing increases the time required for signal stabilization, thus affecting the system timing.
2. Crosstalk
In PCB, crosstalk refers to the unwanted noise interference caused by electromagnetic energy through mutual capacitance and mutual inductance coupling to adjacent transmission lines when the signal propagates on the transmission line. It is caused by the interaction of electromagnetic fields caused by different structures in the same area. Mutual capacitance induces coupling current, which is called capacitive crosstalk; while mutual inductance induces coupling voltage, which is called inductive crosstalk. On PCB, crosstalk is related to the length of the trace, the spacing between signal lines, and the condition of the reference ground plane.
3. Signal delay and timing error
The signal is transmitted at a limited speed on the conductor of the PCB. There is a transmission delay between the signal from the driver end to the receiver. Excessive signal delay or signal delay mismatch may lead to timing errors and confusion of logic device functions.
High-speed digital system design analysis based on signal integrity analysis can not only effectively improve product performance, but also shorten product development cycle and reduce development costs.
PCB design method to ensure signal integrity
By summarizing the factors that affect signal integrity, the following aspects can be considered to better ensure signal integrity during the PCB design process.
(1) Circuit design considerations. This includes controlling the number of synchronous switching outputs and the maximum edge rate (dI/dt and dV/dt) of each unit to obtain the lowest and acceptable edge rate; selecting differential signals for high-output functional blocks (such as clock drivers); terminating passive components (such as resistors, capacitors, etc.) on the transmission line to achieve impedance matching between the transmission line and the load.
(2) Minimize the length of parallel wiring.
(3) Place components away from I/O interconnect interfaces and other areas susceptible to interference and coupling, and minimize the spacing between components.
(4) Shorten the distance between signal traces and reference planes.
(5) Reduce trace impedance and signal drive level.
(6) Terminal matching. Terminal matching circuits or matching components can be added.
(7) Avoid parallel routing and provide sufficient spacing between routing lines to reduce inductive coupling.