Layout and routing are the two most important links in PCB design. After engineers complete the layout and routing of PCB in accordance with the requirements of signal quality, DFM, EMC and other rules, they also need to check the relevant content.
Layout check
In PCB design, reasonable layout is the first step to the success of PCB design. Therefore, after the layout is completed, the following contents need to be strictly checked:
1. PCB size marking, whether the device layout is consistent with the structural drawing, and whether it meets the PCB manufacturing process requirements, such as the minimum aperture and minimum line width.
2. Whether the components interfere with each other in two-dimensional and three-dimensional space, and whether they interfere with the structural shell.
3. Whether all components have been placed.
4. Whether the components that need to be frequently plugged in or replaced are easy to plug in and replace.
5. Whether there is a suitable distance between thermistors and heat-generating components.
6. Is it convenient to adjust adjustable devices and press buttons.
7. Whether the air is unobstructed at the location where the radiator is installed.
8. Whether the signal flow is unobstructed and the interconnection is the shortest.
9. Have you considered the line interference problem?
10. Are the plugs and sockets in conflict with the mechanical design?
Wiring check
Wiring is the most important process in the entire PCB design, which will directly affect the performance of the PCB board. After completing the PCB wiring, engineers need to check the digital and analog, clock and high-speed parts, power supply and ground.
I. Digital and analog
1. Have the routing of digital circuits and analog circuits been separated, and is the signal flow reasonable?
2. If the A/D, D/A and similar circuits divide the ground, do the signal lines between the circuits go from the bridge point between the two grounds (except for differential lines)?
3. The signal lines that must cross the gap between the divided power supplies should refer to the complete ground plane.
4. If the ground layer design is divided without division, ensure that the digital signal and analog signal are divided and routed.
II. Clock and high-speed part
1. Are the impedances of the high-speed signal lines consistent in each layer?
2. Are the high-speed differential signal lines and similar signal lines of equal length, symmetrical, and parallel to each other?
3. Confirm that the clock line is routed in the inner layer as much as possible
4. Confirm whether the clock line, high-speed line, reset line and other strong radiation or sensitive lines have been routed as much as possible according to the 3W principle
5. Are there no bifurcated test points on the clock, interrupt, reset signal, 100M/1000M Ethernet, and high-speed signal?
6. Do low-level signals such as LVDS and TTL/CMOS signals meet 10H as much as possible (H is the height of the signal line from the reference plane)?
7. Do the clock line and high-speed signal line avoid crossing the dense through-hole area or between device pins?
8. Does the clock line meet the (SI constraint) requirements?
9. Do the differential pairs, high-speed signal lines, and various BUS meet the (SI constraint) requirements?
III. Power and ground
1. If the power/ground plane is split, try to avoid high-speed signal crossing on the split reference plane.
2. Confirm that the power and ground can carry enough current. Does the number of vias meet the load requirements (estimation method: 1A/mm line width when the outer layer copper thickness is 1oz, 0.5A/mm line width in the inner layer, double the short-line current)
3. For power supplies with special requirements, does it meet the voltage drop requirements?
4. In order to reduce the edge radiation effect of the plane, the 20H principle should be met as much as possible between the power layer and the ground layer. (If conditions permit, the more the power layer is indented, the better).
5. If there is a ground split, does the split ground not form a loop?
6. Do different power planes on adjacent layers avoid overlapping placement?
7. Is the isolation between the protection ground, -48V ground and GND greater than 2mm?
8. Is the -48V ground only the -48V signal return, and is it not connected to other grounds? If this cannot be done, please explain the reason in the remarks column.
9. Is a 10~20mm protection ground laid near the panel with connectors, and are the layers connected with double rows of staggered holes?
10. Does the distance between the power line and other signal lines meet the safety requirements?
IV. Prohibited areas
1. There should be no routing, copper foil and vias that may cause short circuits under metal shell devices and heat dissipation devices
2. There should be no routing, copper foil and vias that may cause short circuits around the mounting screws or washers; the screw holes are designed as star-shaped holes; the prohibited distance around them is more than 20mil
3. Are there any routing lines in the reserved position in the design requirements?
4. The distance between the inner layer of the non-metallized hole and the line and copper foil should be greater than 0.5mm (20mil), and the outer layer should be 0.3mm (12mil)
The distance between the inner layer of the single board puller wrench shaft hole and the line and copper foil should be greater than 2mm (80mil)
5. The recommended distance between the copper foil and the line to the board edge is greater than 2mm, and the minimum is 0.5mm
6. The distance between the inner layer of the ground copper foil and the board edge is 1 ~ 2 mm, and the minimum is 0.5mm